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2進数比較回路の低消費電力化手法
https://ous.repo.nii.ac.jp/records/1715
https://ous.repo.nii.ac.jp/records/171586268d04-822a-4df6-9033-fd0124dd12da
名前 / ファイル | ライセンス | アクション |
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38a19.pdf (672.5 kB)
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Item type | 紀要論文(ELS) / Departmental Bulletin Paper(1) | |||||||||||
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公開日 | 2003-03-31 | |||||||||||
タイトル | ||||||||||||
言語 | ja | |||||||||||
タイトル | 2進数比較回路の低消費電力化手法 | |||||||||||
タイトル | ||||||||||||
言語 | en | |||||||||||
タイトル | The Power Reduction Method of a Binary Number Comparator | |||||||||||
タイトル | ||||||||||||
言語 | ja-Kana | |||||||||||
タイトル | 2シンスウ ヒカク カイロ ノ テイ ショウヒ デンリョクカ シュホウ | |||||||||||
言語 | ||||||||||||
言語 | jpn | |||||||||||
資源タイプ | ||||||||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||||||||
資源タイプ | departmental bulletin paper | |||||||||||
ページ属性 | ||||||||||||
内容記述タイプ | Other | |||||||||||
内容記述 | P(論文) | |||||||||||
著者名 |
田丸, 啓吉
× 田丸, 啓吉
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著者所属(日) | ||||||||||||
ja | ||||||||||||
岡山理科大学工学部電子工学科 | ||||||||||||
著者所属(英) | ||||||||||||
en | ||||||||||||
Department of Electronic Engineering, Faculty of Engineering, Okayama University of Science | ||||||||||||
雑誌書誌ID | ||||||||||||
収録物識別子タイプ | NCID | |||||||||||
収録物識別子 | AN00033244 | |||||||||||
書誌情報 |
ja : 岡山理科大学紀要. A, 自然科学 en : Bulletin of Okayama University of Science. A, Natural Sciences 巻 38, p. 149-155, 発行日 2003-03-31 |